By the end of the year, AMD will expand its range of server processors based on the Zen 4 architecture with the Genoa-X and Sienna families. A distinctive feature of the first will be the increased amount of cache memory of the third level, and the second – the optimization of performance per watt. The characteristics of the new “stones” are already available on the Web.
AMD EPYC Genoa-X processors feature an SP5 design, offer up to 96 Zen 4 cores, and feature 1152MB of L3 cache. That is, chips with an additional 64 MB of L3 cache will be soldered on all 12 chiplets with Zen 4 cores. Recall that regular Genoa CPUs have up to 384 MB of L3 cache. Other features include support for dual-socket configurations and DDR5-4800 memory, as well as a 400-watt TDP level, which can be reduced to 320 watts.
In the case of AMD Siena, the Socket SP6 platform will be used. These processors will receive up to 64 Zen 4c cores and stand out against the background of the Genoa family with half the amount of cache memory: instead of 32 MB, the CCX module has 16 MB. There is support for DDR5-4800 RAM, and the TDP level can be adjusted in the range from 155 to 225 watts. The official release of AMD Siena chips is scheduled for the second half of the year.
Source:
ComputerBase
