Chinese enthusiast Nemez (GPUsAreMagic) posted a new image of the AMD Strix Point mobile processor crystal on social networks with detailed diagrams and comments. It is significantly larger in size compared to Phoenix Point – 12.06×18.71 mm versus 9.06×15.01 mm. The sizes of the CPU, iGPU and NPU blocks have increased. The process technology has been improved to TSMC N4P.
The processor has 12 cores distributed between two CCXs, one of which contains four Zen 5 cores with a shared 16 MB L3 cache, and the other contains eight Zen 5c cores with a shared 8 MB L3 cache. Both CCXs communicate with the rest of the chip via the Infinity Fabric bus. The fairly large iGPU occupies the central part of the crystal. It is based on the RDNA 3.5 graphics architecture and has 8 WGP (Workgroup Processor), which corresponds to 16 Compute Units. The GPU has its own 2 MB L2 cache, which simplifies data transfer to the Infinity Fabric.
Separate from the iGPU are its related components — the Media Engine and Display Engine. The Media Engine provides hardware acceleration for encoding and decoding h.264, h.265, and AV1, as well as some legacy video formats. The Display Engine is responsible for the operation of video outputs such as DisplayPort, eDP, and HDMI.
The NPU is the third major logical component of Strix Point. This second-generation NPU from AMD is significantly larger than the one in Phoenix Point. It is based on the more advanced XDNA 2 architecture and contains 32 AI units with their own high-speed local memory, as well as control logic that interacts with the Infinity Fabric. This NPU meets and even exceeds the hardware requirements of Microsoft Copilot+ and provides 50 TOPS of computing power. The memory controller supports DDR5-5600 and LPDDR5-7500.
The Strix Point die has a smaller PCIe complex than Phoenix, reducing the number of PCIe Gen 4 lanes to 16 (x8 PEG + x4 NVMe + x4, configured as USB4 or GPP). The marketing idea behind the reduced PCIe lanes is that AMD Strix Point is designed to combat Intel Lunar Lake, which also only has x4 for PEG/GPP. And when Intel Arrow Lake-H and Arrow Lake-HX processors arrive, they will be met by AMD’s Fire Range chip, which has 28 PCIe Gen 5 lanes and can work with even the fastest discrete mobile GPUs.
Source:
Techpowerup
