Chinese scientists find way to bypass sanctions and EUV lithography for 3nm wafers

Chinese researchers have developed a way to produce 3nm-class transistors using deep ultraviolet lithography (DUV) instead of the more modern EUV. The development is still in its early stages and not yet ready for mass production, but it shows that China continues to find ways to produce advanced semiconductors without using the latest Western equipment.

Image source: SMIC

The Institute of Microelectronics of the Chinese Academy of Sciences (IMECAS) has developed a preliminary process technology specifically for manufacturing gate-all-around (GAA) transistors using off-the-shelf DUV equipment. The South China Morning Post quoted the institute’s chief engineer Ye Tianchun’s speech as reporting the news.

GAA is not a replacement for EUV lithography, but a transistor design with gates surrounding the channel on all sides. By repeating patterning on the wafer, DUV can be used to obtain structures corresponding to the 3 nm scale. This approach requires more exposures, masks, and technical operations, which complicates production, increases costs, and creates additional difficulties in the accuracy of layer alignment and yield of usable crystals.

The work comes against a backdrop of restricted supply of equipment from China. ASML is unable to sell EUV lithography machines, which manufacturers use to cost-effectively produce cutting-edge wafers, to Chinese customers. In theory, some critical layers could be formed using DUV, but multiple exposures make the process more complex and expensive. GAA transistors are already in mass production: Samsung will start producing 3nm wafers with this design in 2022, and TSMC uses it in its 2nm N2 process technology.

The Chinese Academy of Sciences emphasized that R&D is still far from mass production. Ye Tianchun said that only after testing the wafers on the actual production line, its prospects will become clearer. Even the successful production of a single GAA transistor does not mean that a mature technological process is ready: it is necessary to master the formation of interconnections and other layers, achieve an acceptable yield of usable crystals and ensure production stability.

In 2025, researchers from the Academy of Sciences also launched a solid-state coherent radiation source with a wavelength of 193 nm, corresponding to the light source used in modern deep ultraviolet lithography. The development is seen as a possible basis for future lithography system components, but is not itself a ready-made replacement for industrial ASML light sources and scanners.

Huawei Technologies Co. is also developing ways to further scale its own chips. In May, the company introduced the Tau Law of Scaling concept, which dictates increases in computing density through architectural changes and so-called temporary scaling. Huawei expects that by 2031, its high-performance processors will be able to achieve transistor densities comparable to the expected performance of 1.4nm process technology. We’re talking about equivalent density, not mastering physical production according to the 1.4 nm standard.